Data Registers Four bit data registers are used for arithmetic, logical, and other operations. Lower halves of the bit registers can be used as four bit data registers:
They are grouped into several categories as follows: The instruction pointer, IP sometimes referred to as the program counter. Although I refer to the first four registers as "general-purpose'', each of them is designed to play a particular role in common use: Some other operations, such as ADD and SUB, may be applied to any of the registers that is, any of the eight general- and special-purpose registers but are more efficient when working with the accumulator.
BX is the "base'' register; it is the only general-purpose register which may be used for indirect addressing. CX is the "count'' register. DX is the "data'' register; it is used together with AX for the word-size MUL and DIV operations, and it can also hold the port number for the IN and OUT instructions, but it is mostly available as a convenient place to store data, as are all of the other general-purpose registers.
Here are brief descriptions of the four special-purpose registers: SP is the stack pointer, indicating the current position of the top of the stack. You should generally never modify this directly, since the subroutine and interrupt call-and-return mechanisms depend on the contents of the stack.
BP is the base pointer, which can be used for indirect addressing similar to BX. It is also available as an offset, just like SI. To support machines with more than 64K of physical memory, Intel implemented the concept of segmented memory.
As an example, in the instruction MOV [BX], AX mentioned above, the BX register really provides the offset of a location in the current data segment; to find the true physical address into which the contents of the accumulator will be stored, you have to add the value in BX to the address of the start of the data segment.
This segment start address is determined by taking the bit number in DS and multiplying by This computation illustrates one reason why hexadecimal is so useful; multiplication by 16 corresponds to shifting the hex digits left one place and appending a zero.
We refer to this combined address as Intel considered that this would be enough for applications of the over its projected lifetime of about five years from its introduction in ; by the time microcomputers were needing more than a meg of main memory, the next Intel processor the iAPX was due to be available, with a bit address space able to address 4Gover 4 billion memory locations.
However, the IBM PC's debut in and subsequent popularity has forced Intel to continue the 80x86 family of backward-compatible processors to the present, including support for a mode in which only 1M of memory is accessible.
Processors since the have also provided the "protected'' mode of operation, which in the Pentium gives each process a flat bit address space of up to 4G.
You might think that a segment register would only need to provide the uppermost 4 bits to extend an address out to 20 bits, but consider one of the implications of only having 16 different, non-overlapping segments: By allowing a segment to start at any address divisible by 16, the memory may be allocated much more efficientlyif one program only needs 4K for its code segment, then theoretically the operating system could load another program into a segment starting just 4K above the start of the first.
Each segment register has its own special uses: CS determines the "code'' segment; this is where the executable code of a program is located. It is not directly modifiable by the programmer, except by executing one of the branching instructions.
One of the reasons for separating the code segment from other segments is that well-behaved programs never modify their code while executing; therefore, the code segment can be identified as "read-only''. This simplifies the work of a cache, since no effort is required to maintain consistency between the cache and main memory.
It also permits several instances of a single program to run at once in a multitasking operating systemall sharing the same code segment in memory; each instance has its own data and stack segments where the information specific to the instance is kept.
Picture multiple windows, each running Word on a different document; each one needs its own data segment to store its document, but they can all execute the same loaded copy of Word. DS determines the "data'' segment; it is the default segment for most memory accesses.
ES determines the "extra'' segment; it can be used instead of DS when data from two segments need to be accessed at once. SS determines the "stack'' segment; the stack pointer SP gives the offset of the current top-of-stack within the stack segment.
The BP register also gives an offset relative to the stack segment by default, for convenient access to data further down in the stack without having to modify SP.
Just as with SP, you should not modify SS unless you know exactly what you are doing. The instruction pointer, IP, gives the address of the next instruction to be executed, relative to the code segment. The only way to modify this is with a branch instruction. The status register, FLAGS, is a collection of 1-bit values which reflect the current state of the processor and the results of recent operations.
Nine of the sixteen bits are used in the Segment registers hold the base value of different segments like Code Segment, Data Segment etc. The contents of these segments are accessed using the Base Address + Offset.
works in Real Mode (Can access only 1 Megabyte of memory). But segme. The four segment registers actually contain the upper 16 bits of the starting addresses of the four memory segments of 64 KB each with which the is working at that instant of time.
A segment is a logical unit of memory that may be up to 64 kilobytes long. Assembly Language Six Things You Should Know About the 1) The is a bit processor. This topic is discussed in the section Segment Registers below.
Segment Registers. One of the segment registers is always used as the segment when evaluating an address. The CPU uses 16 bit addressing, but has a 20 bit bus for memory access so the 16 bit segments registers allow full access to this.
The code and data segment registers are for those uses, which make 3, but with only one data segment register it is not easy to copy data between segments without lots of swapping.
x86 memory segmentation refers to the implementation of memory segmentation in the Intel x86 computer instruction set architecture. Segmentation was introduced on the Intel in as a way to allow programs to address more than 64 the system uses bit segment registers to derive the actual memory address.
In real mode, the registers.
The four segment registers actually contain the upper 16 bits of the starting addresses of the four memory segments of 64 KB each with which the is working at that instant of time.
A segment is a logical unit of memory that may be up to 64 kilobytes long.